1, infrared remote control receiver circuit design <br> <br> all output of the infrared remote controller is 38kHz ~ 40kHz square wave is generated by pulse amplitude modulation encoded serial data. If the measured wave is measured directly and the pulse width is only 20 microseconds, the microcontroller will have a large error because the instruction cycle is microseconds. Therefore, the modulated wave is first demodulated and the demodulated waveform is measured. The remote control encoding pulse demodulated by the CX20106 or the integrated infrared receiver head is directly connected to the INT0 and T0 pins of the SM8952 AC25P microcontroller. The timers T0 and T1 are initialized to the timing operation mode 1, and the GATE bit of T0 is set. Every time the external interrupt first stops timing, the count value of T0, T1 is recorded, then the count value of T0, T1 is cleared, and the timing is restarted. The value of T0 is the high-level pulse width, and the value of T1 to T0 is the low-level pulse width. Correspondence between T0 and T1 and the pulse width of the infrared coded signal is stored in the external memory 24C256 to wait for sending and calling.
2, reducing design <br> <br> infrared remote remote control signal transmission circuit is high level and the low level of the binary pulse code modulated output through a special outlet SM8952 AC25P T2, wherein the modulation is performed using a single-chip special function Internal modulation This is also an innovation of this design. The modulated signal is shown in Figure 3.5-2. The hardware circuit of this design is relatively simple, so the debugging of the system focuses on the software.
2, reducing design <br> <br> infrared remote remote control signal transmission circuit is high level and the low level of the binary pulse code modulated output through a special outlet SM8952 AC25P T2, wherein the modulation is performed using a single-chip special function Internal modulation This is also an innovation of this design. The modulated signal is shown in Figure 3.5-2. The hardware circuit of this design is relatively simple, so the debugging of the system focuses on the software.
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